June 19, 2024

According to a new report from DigiTimes, TSMC has started mass production of Intel’s next-generation Lunar Lake CPUs on its new 3nm EUV FinFET process node. 2 VIEW GALLERY – 2 IMAGES Intel’s next-gen Lunar Lake processor is a chiplet-based design that sees CPU cores, an integrated GPU, NPU, and even on-package memory on a single chiplet on a compute tile, all made on TSMC’s 3nm process node. The SoC and I/O dies will be

Apple is gearing up to release its next-gen M4-powered MacBook Pro laptops, with a new post on X suggesting we’ll see new 14-inch and 16-inch MacBook Pros powered by the M4 processor later this year. 2 VIEW GALLERY – 2 IMAGES The only M4-powered product in Apple’s growing arsenal is the new iPad Pro, but in a new post on X to subscribers, Ross Young from Display Supply Chain Consultants said his recent supply chain

Samsung Electronics is moving in a slightly different direction it seems, investing in GPU technology that would see it shift away from its typical memory semiconductor, and foundry services. 2 VIEW GALLERY – 2 IMAGES In a new report from Business Korea, Samsung Electronics’ corporate governance report teases that the management committee ratified the “GPU Investment Proposal” back in March 2024. The committee includes senior executives including Han Jong-hee, the head of the Device eXperience

Intel’s Open Image Denoiser (OIDN) is an open-source library that uses the GPU for the “denoising process” which has been updated to include support for its upcoming Arrow Lake and Lunar Lake chips with integrated GPUs, as well as its next-gen Battlemage “Xe2” GPU. The denoising technology removes grain and artifacts in a ray-tracing rendered image using multiple algorithms, preserving the original image quality and fidelity. OIDN includes faster rendering times, with the “noise” being

Cadence stole the show recently at the PCI-SIG DevCon 2024 event, and in honor of the 32nd anniversary of the PCI-SIG Developer’s Conference, Cadence announced a complete PCIe 7.0 IP solution for HPC and AI markets of the future. 6 Piper – Cadence PHY IP for PCIe 7.0 (source: Cadence) VIEW GALLERY – 6 IMAGES The AI boom is creating a gigantic demand for faster-than-ever chips, which demand next levels of throughput, low latency, and